The XR81111 is a family of Universal Clock synthesizer devices in a 5mm x 7mm QFN-10 package. The devices generate ANY frequency in the range of 10 MHz to 1.5GHz by utilizing a highly flexible delta sigma modulator and a wide ranging VCO. The high clock frequency LVCMOS/LVDS/LVPECL outputs have very low phase noise jitter of sub 0.6ps, while consuming extremely low power. These devices can be used with standard crystals or external system clock and can be configured to select from four different frequency multiplier settings to support a wide variety of applications. This family of products have an extremely low power PLL block with core power consumption less than 40% of the equivalent devices from competition.
The block diagram shows a typical synthesizer configuration with any standard crystal oscillating in fundamental mode. Internal load capacitors are optionally available to eliminate external crystal loads. A system clock can also be used to overdrive the oscillator for a synchronous timing system. The differential LVDS/LVPECL and single ended CMOS outputs have industry standard interface loading configuration.
The typical phase noise plot shows the jitter integrated over the 12KHz to 20MHz range that is widely used in WAN systems. Most LAN applications however use the integration range of 1.875MHz to 20MHz.These clock devices show a very good high frequency noise floor below - 150dB.