Voltage mode PWM
Voltage mode PWM is a simple technique that uses a single loop to control the output voltage. As shown in Figure 1, the output voltage is compared to a reference voltage with an error amplifier. The output of the error amplifier is then compared to a sawtooth and that output is used to drive the MOSFET, usually via a voltage divider.
As shown in Figure 2, the output voltage is modulated by turning the high-side FET on (on-time) with the pulse width and turning the low side FET off. At the end of the pulse, the high-side FET is turned off (off-time) and the low side FET is turned on until the next pulse. Vout = On-Time/Period * Vin.
The advantages of voltage mode PWM is that it is a very simple, common, smaller solution with good accuracy. The disadvantages are that complex frequency compensation is required (two poles) to stabilize the loop and because trailing edge control is most commonly used, there is a delay in load step response.
Current mode PWM
With voltage mode PWM, current is less known. For better control, current mode PWM senses the inductor current and it is compared to the reference voltage as shown in Figure 3.
Although the current has to be sensed with accuracy and introduces noise, the advantages of current mode PWM are easier loop compensation (less compensation needed with one pole), and it is easier to implement over-current protection and parallel currents to the output.
Standard Constant On-Time (COT)
As opposed to PWM, the pulse width in COT is always the same as shown in Figure 4. Instead the off-time length varies (as does the frequency) which modulates the output. As the Vout increases, the off-time of the duty cycle increases (frequency decreases) and the fixed on-time produces a lower duty cycle. This transfers less energy to the output and lowers the Vout. More simply said, as Vout increases, the duty cycle decreases. Conversely, as the Vout decreases, the off-time of the duty cycle decreases (frequency increases) and the fixed on-time produces a higher duty cycle. This transfers more energy to the output and raises the Vout.
The advantages of standard COT are very fast transient response, simplicity (inexpensive) and that frequency compensation is not complex as it is in PWM control. However, the feedback signal tends to have low amplitude and signal to noise ratio, making it very noise sensitive. Also, the output voltage is higher than the reference voltage and the ripple is dependent on and sensitive to the output capacitor ESR. This introduces a DC offset which is the average amount the output voltage is over the reference voltage. It is also jitter prone and the frequency changes during the load steps.
Some solutions solve the noise sensitivity by having one of two options that condition the feedback signal but introduce delays. One tradeoff provides faster transient responses; the other allows low ESR output capacitors to be used.
MaxLinear’s patented COT
MaxLinear’s patented COT architecture however conditions the reference instead as shown in Figure 5. The MaxLinear devices create their own emulated ramp that is insensitive to noise and the ESR of the capacitor. Since the output capacitor ESR does not affect it, low ESR ceramic capacitors can be used and maintain stability without decreasing speed. In addition, the Vout and reference voltage are compared and that result controls the ramp circuit. This creates a slower loop where the output voltage is averaged out and the DC offset is not introduced as in standard COT.
MaxLinear’s COT still has the standard COT advantages of very fast transient response, simplicity and no complex frequency compensation in addition to not having DC offset or ESR value sensitivity. MaxLinear’s COT architecture provides exceptional line and load regulation.