ST16C654D
Quad UART with 64-Byte FIFO and Infrared (IrDA) Encoder/Decoder

Features

  • Compatibility with the Industry Standard ST16C454/554, ST68C454/554, TL16C554
  • 1.5 Mbps transmit/receive operation (24MHz)
  • 64 byte transmit FIFO
  • 64 byte receive FIFO with error flags
  • Automatic software/hardware flow control
  • Programmable Xon/Xoff characters
  • Independent transmit and receive control
  • Software selectable Baud Rate Generator pre-scaleable clock rates of 1X, 4X
  • Four selectable Transmit/Receive FIFO interrupt trigger levels
  • Standard modem interface or infrared IrDA encoder/decoder interface
  • Software flow control turned off optionally by any (Xon) RX character
  • Independent MIDI interface on 100 pin packages
  • 100-pin packages offer internal register FIFO monitoring and separate IrDA TX outputs
  • Sleep mode ( 200mA stand-by)
  • Pb-Free, RoHS Compliant Versions Offered
Applications

  • Portable Appliances
  • Telecommunication Network Routers
  • Ethernet Network Routers
  • Cellular Data Devices
  • Factory Automation and Process Controls
Description

The ST16C6541 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554 and ST68C554. The 654 is an enhanced UART with 64 byte FIFOs, automatic hardware/software flow control, and data rates up to 1.5Mbps. Onboard status registers provide the user with error indications and operational status, modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics.

The 654 is available in a 64-pin LQFP package. The 64-pin package offers the 16 interface mode which is compatible with the industry standard ST16C554.

The ST16C654DCQ64 provides constant active interrupt outputs. The 64 pin devices do not offer TXRDY/RXRDY outputs or the default clock select option (CLKSEL). The 654 combines the package interface modes of the 16C454/554 and 68/C454/554 series on a single integrated chip.

NOTE: 1 Covered by U.S. Patent #5,649,122.

For UART technical support or to obtain an IBIS model for this product, please email Exar's UART Technical Support group.
Part NumberPkg CodeRoHSMin
Temp.
(°C)		Max
Temp.
(°C)		StatusBuy NowOrder Samples
ST16C654DCQ64-FLQFP64LQFP64070Active
ST16C654DIQ64-FLQFP64LQFP64-4085Active

Part Status Legend
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs. 
Specifications
CH4
CPUInterfaceIntel or Motorola
Data Rate@5/3.3/2.5V1.5/0.5/na
Tx/RxFIFO(Bytes)64/64
Tx/RxFIFOCtrsNo
Tx/RxFIFOINT Trig4 Levels/ 4 Levels
AutoRTS/CTSYes
IrDaSupYes
5VTolInputsNo
Sup V2.97-5.5
PkgsLQFP-64
Documents
Datasheets
Datasheet
Version 5.0.2
August 2005
1.08 MB
Application Notes
DAN-107, Interfacing 16Cxxx UARTs to a CPU
Version 1.0.0
August 1999
32.43 KB
DAN-108, UART Crystal Oscillator Design Guide
Version 1.0.0
March 2000
58.16 KB
DAN-133, EXAR's ST16C554 vs TL16C554
Version 1.0.0
April 2002
94.42 KB
DAN-134, EXAR's ST16C654 vs. TL16C754B
Version 1.0.0
June 2002
72.50 KB
General UART Application Note
Version 1.0.0
December 1996
39.81 KB
AN-204, UART Sleep Mode
Version 1.0.0
June 2010
511.72 KB
Schematics
ISA Eval Board Schematic
Version 1.1.0
September 2007
187.38 KB
Manuals
Evaluation Board User's Manual
Version 2.0.0
August 2003
17.28 KB